VHDL for logic synthesis
Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results fro...
| Main Author: | |
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| Format: | eBook |
| Language: | Inglés |
| Published: |
Chichester, West Sussex, U.K. :
Wiley
2011.
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| Edition: | 3rd ed |
| Subjects: | |
| See on Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009628970806719 |
| Summary: | Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the |
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| Item Description: | Description based upon print version of record. |
| Physical Description: | 1 online resource (486 p.) |
| Bibliography: | Includes bibliographical references and index. |
| ISBN: | 9781119995739 9780470977972 9781283373890 9786613373892 9780470977927 9781119995852 |
