Introduction to digital systems modeling, synthesis, and simulation using VHDL

A unique guide to using both modeling and simulation in digital systems design Digital systems design requires rigorous modeling and simulation analysis that eliminates design risks and potential harm to users. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL introduc...

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Detalles Bibliográficos
Autor principal: Ferdjallah, Mohammed (-)
Formato: Libro electrónico
Idioma:Inglés
Publicado: Hoboken, N.J. : Wiley c2011.
Edición:1st edition
Materias:
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627799306719
Descripción
Sumario:A unique guide to using both modeling and simulation in digital systems design Digital systems design requires rigorous modeling and simulation analysis that eliminates design risks and potential harm to users. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL introduces the application of modeling and synthesis in the effective design of digital systems and explains applicable analytical and computational methods. Through step-by-step explanations and numerous examples, the author equips readers with the tools needed to model, synthesize, and
Notas:Includes index.
Descripción Física:1 online resource (227 p.)
Bibliografía:Includes bibliographical references and index.
ISBN:9781283138826
9786613138828
9781118007709
9781118007716
9781118007693