Verilog Coding for Logic Synthesis

Verilog Coding for Logic Synthesis

Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with practical design problems that design engineers solve on a daily basis. Includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micr...

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Detalles Bibliográficos
Otros Autores: Lee, Weng Fook Author (author)
Formato: Libro electrónico
Idioma:Inglés
Publicado: [Place of publication not identified] Wiley Interscience Imprint 2003
Edición:1st edition
Materias:
Digital electronics.
Logic circuits > Computer-aided design.
Verilog (Computer hardware description language)
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627036806719
Tabla de Contenidos:
  • Introduction
  • Asic design flow
  • Verilog coding
  • Coding style : best-known method for synthesis
  • Design example of programmable timer
  • Design example of programmable logic block for peripheral interface.

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