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121Publicado 2018Materias: “…Networks on a chip…”
Libro electrónico -
122Publicado 2016Materias: “…Networks on a chip…”
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123Publicado 2021Materias: “…Networks on a chip…”
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124Publicado 2016Materias: “…Networks on a chip…”
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125Publicado 2019Materias:Libro electrónico
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126por Dimitrakopoulos, Giorgos“…Interconnection Network Architecture On-Chip, Multi-Chip '14…”
Publicado 2014
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132Publicado 2015Tabla de Contenidos: “…Chapter 4 - The Cerebot MX3cK (chipKIT MX3) Development Board…”
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137
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138Publicado 2023Tabla de Contenidos: “…Cover -- Title Page -- Copyright Page -- Contents -- List of Contributors -- Preface -- Chapter 1 Applications of VLSI Design in Artificial Intelligence and Machine Learning -- 1.1 Introduction -- 1.2 Artificial Intelligence -- 1.3 Artificial Intelligence & -- VLSI (AI and VLSI) -- 1.4 Applications of AI -- 1.5 Machine Learning -- 1.6 Applications of ML -- 1.6.1 Role of ML in Manufacturing Process -- 1.6.2 Reducing Maintenance Costs and Improving Reliability -- 1.6.3 Enhancing New Design -- 1.7 Role of ML in Mask Synthesis -- 1.8 Applications in Physical Design -- 1.8.1 Lithography Hotspot Detection -- 1.8.2 Pattern Matching Approach -- 1.9 Improving Analysis Correlation -- 1.10 Role of ML in Data Path Placement -- 1.11 Role of ML on Route Ability Prediction -- 1.12 Conclusion -- References -- Chapter 2 Design of an Accelerated Squarer Architecture Based on Yavadunam Sutra for Machine Learning -- 2.1 Introduction -- 2.2 Methods and Methodology -- 2.2.1 Design of an n-Bit Squaring Circuit Based on (n-1)-Bit Squaring Circuit Architecture -- 2.2.1.1 Architecture for Case 1: A < -- B -- 2.2.1.2 Architecture for Case 2: A > -- B -- 2.2.1.3 Architecture for Case 3: A = B -- 2.3 Results and Discussion -- 2.4 Conclusion -- References -- Chapter 3 Machine Learning-Based VLSI Test and Verification -- 3.1 Introduction -- 3.2 The VLSI Testing Process -- 3.2.1 Off-Chip Testing -- 3.2.2 On-Chip Testing -- 3.2.3 Combinational Circuit Testing -- 3.2.3.1 Fault Model -- 3.2.3.2 Path Sensitizing -- 3.2.4 Sequential Circuit Testing -- 3.2.4.1 Scan Path Test -- 3.2.4.2 Built-In-Self Test (BIST) -- 3.2.4.3 Boundary Scan Test (BST) -- 3.2.5 The Advantages of VLSI Testing -- 3.3 Machine Learning's Advantages in VLSI Design -- 3.3.1 Ease in the Verification Process -- 3.3.2 Time-Saving -- 3.3.3 3Ps (Power, Performance, Price)…”
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