Materias dentro de su búsqueda.
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- Electrónica 84
- Transistors 48
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- Electronics 31
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164por Hoffmann, Kurt, 1951-
Publicado 2004Universidad Loyola - Universidad Loyola Granada (Otras Fuentes: Biblioteca de la Universidad Pontificia de Salamanca)Enlace del recurso
Libro electrónico -
165por Smoszna, MarekTabla de Contenidos: “…4.9 Clock Coupling on the Internal Dynamic Node4.10 Minority Carrier Charge Injection; 4.11 Alpha Particles; 4.12 Noise Induced on Dynamic Nodes Directly; 4.13 Example of Transistor Crosstalk During Precharge; 4.14 CSR Latch Signal Ordering; 4.15 Interfacing to Transmission Gates; 5 Topology Considerations; 5.1 Limitation on Device Stacking; 5.2 Limitation of Logic Width; 5.3 Use of Low/High Vt Transistors; 5.4 Sharing Evaluation Devices; 5.5 Tapering of the Evaluation Device; 5.6 Footed versus Unfooted; 5.7 Compounding Outputs; 5.8 Late Arriving Input on Top; 5.9 Making Keepers Weak…”
Publicado 2012
Libro electrónico -
166Publicado 2013“…For this, reliable and flexible transmission line and transistor models are required. The models are created and their accuracy is verified up to 325 GHz. …”
Libro electrónico -
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168
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169
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170Publicado 1971Materias: “…Circuits de transistors…”
Libro -
171Publicado 1972Materias: “…Transistors…”
Libro -
172Publicado 2018Tabla de Contenidos: “…Front Cover -- Half Title page -- RIVER PUBLISHERS SERIES IN ELECTRONIC MATERIALS AND DEVICES -- Title Page - Silicon-Germanium Heterojunction Bipolar Transistors for mm-Wave Systems: Technology, Modeling and Circuit Applications -- Copyright page -- Contents -- Preface -- Acknowledgements -- List of Contributors -- List of Figures -- List of Tables -- List of Abbreviations -- Introduction -- Motivation and Objectives of the DOTSEVEN Project -- Approach toward Achieving the Ambitious Goals -- Overview of Results and Their Impact -- References -- Chapter 1 - SiGe HBT Technology -- 1.1 Introduction -- 1.2 HBT Performance Factors -- 1.3 HBT Device and Process Architectures Explored in the DOTSEVEN Project -- 1.3.1 Selective Epitaxial Growth of the Base -- 1.3.1.1 DPSA-SEG device architecture -- 1.3.1.2 Approaches to overcome limitations of the DPSA-SEG architecture -- 1.3.2 Non-selective Epitaxial Growth of the Base -- 1.4 Optimization of the Vertical Doping Profile -- 1.5 Optimization towards 700 GHz fMAX -- 1.6 Summary -- References -- Chapter 2 - Device Simulation -- 2.1 Numerical Simulation -- 2.2 Device Simulation -- 2.2.1 TCAD Device Optimization -- 2.2.2 Deterministic BTE Solvers -- 2.2.3 Drift-diffusion and Hydrodynamic Transport Models -- 2.2.4 Simulation Examples -- 2.2.4.1 DD simulation -- 2.2.4.2 HD simulation -- 2.2.4.3 Effects beyond DD and HD transport -- 2.2.4.4 Comparison with experimental data -- 2.3 Advanced Electro-thermal Simulation -- 2.3.1 Carrier-Phonon System in SiGe HBTs -- 2.3.2 Deterministic and Self-consistent Electrothermal Simulation Approach -- 2.3.3 Hot Phonon Effects in a Calibrated System -- 2.3.4 Thermal Resistance Extraction from the Simulated DC Characteristics -- 2.4 Microscopic Simulation of Hot-carrier Degradation -- 2.4.1 Physics of Hot-carrier Degradation -- 2.4.2 Modeling of Hot-carrier Effects…”
Libro electrónico -
173Publicado 1999Materias: “…Bipolar transistors…”
Libro electrónico -
174
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175
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176Publicado 1992Materias: “…Transistores…”
Biblioteca de la Universidad Pontificia de Salamanca (Otras Fuentes: Biblioteca de la Universidad de Navarra, Biblioteca Universitat Ramon Llull)Libro -
177Publicado 1978Materias: “…Transistores…”
Biblioteca de la Universidad Pontificia de Salamanca (Otras Fuentes: Biblioteca de la Universidad de Navarra)Libro -
178
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180