Architectures for computer vision : from algorithm to chip with Verilog

Architectures for computer vision from algorithm to chip with Verilog

This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit impl...

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Bibliographic Details
Other Authors: Jeong, Hong, author (author)
Format: eBook
Language:Inglés
Published: Singapore : Wiley 2014.
Edition:1st ed
Subjects:
Verilog (Computer hardware description language)
Computer vision.
See on Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009849098306719
Table of Contents:
  • Architectures for Computer Vision; Contents; About the Author; Preface; Part One Verilog HDL; 1 Introduction; 1.1 Computer Architectures for Vision; 1.2 Algorithms for Computer Vision; 1.3 Computing Devices for Vision; 1.4 Design Flow for Vision Architectures; Problems; References; 2 Verilog HDL, Communication, and Control; 2.1 The Verilog System; 2.2 Hello, World!; 2.3 Modules and Ports; 2.4 UUT and TB; 2.5 Data Types and Operations; 2.6 Assignments; 2.7 Structural-Behavioral Design Elements; 2.8 Tasks and Functions; 2.9 Syntax Summary; 2.10 Simulation-Synthesis
  • 2.11 Verilog System Tasks and Functions2.12 Converting Vision Algorithms into Verilog HDL Codes; 2.13 Design Method for Vision Architecture; 2.14 Communication by Name Reference; 2.15 Synchronous Port Communication; 2.16 Asynchronous Port Communication; 2.17 Packing and Unpacking; 2.18 Module Control; 2.19 Procedural Block Control; Problems; References; 3 Processor, Memory, and Array; 3.1 Image Processing System; 3.2 Taxonomy of Algorithms and Architectures; 3.3 Neighborhood Processor; 3.4 BPBP Processor; 3.5 DP Processor; 3.6 Forward and Backward Processors; 3.7 Frame Buffer and Image Memory
  • 3.8 Multidimensional Array3.9 Queue; 3.10 Stack; 3.11 Linear Systolic Array; Problems; References; 4 Verilog Vision Simulator; 4.1 Vision Simulator; 4.2 Image Format Conversion; 4.3 Line-based Vision Simulator Principle; 4.4 LVSIM Top Module; 4.5 LVSIM IO System; 4.6 LVSIM RAM and Processor; 4.7 Frame-based Vision Simulator Principle; 4.8 FVSIM Top Module; 4.9 FVSIM IO System; 4.10 FVSIM RAM and Processor; 4.11 OpenCV Interface; Problems; References; Part Two Vision Principles; 5 Energy Function; 5.1 Discrete Labeling Problem; 5.2 MRF Model; 5.3 Energy Function; 5.4 Energy Function Models
  • 5.5 Free Energy5.6 Inference Schemes; 5.7 Learning Methods; 5.8 Structure of the Energy Function; 5.9 Basic Energy Functions; Problems; References; 6 Stereo Vision; 6.1 Camera Systems; 6.2 Camera Matrices; 6.3 Camera Calibration; 6.4 Correspondence Geometry; 6.5 Camera Geometry; 6.6 Scene Geometry; 6.7 Rectification; 6.8 Appearance Models; 6.9 Fundamental Constraints; 6.10 Segment Constraints; 6.11 Constraints in Discrete Space; 6.12 Constraints in Frequency Space; 6.13 Basic Energy Functions; Problems; References; 7 Motion and Vision Modules; 7.1 3D Motion; 7.2 Direct Motion Estimation
  • 7.3 Structure from Optical Flow7.4 Factorization Method; 7.5 Constraints on the Data Term; 7.6 Continuity Equation; 7.7 The Prior Term; 7.8 Energy Minimization; 7.9 Binocular Motion; 7.10 Segmentation Prior; 7.11 Blur Diameter; 7.12 Blur Diameter and Disparity; 7.13 Surface Normal and Disparity; 7.14 Surface Normal and Blur Diameter; 7.15 Links between Vision Modules; Problems; References; Part Three Vision Architectures; 8 Relaxation for Energy Minimization; 8.1 Euler-Lagrange Equation of the Energy Function; 8.2 Discrete Diffusion and Biharminic Operators; 8.3 SOR Equation
  • 8.4 Relaxation Equation

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