Microprocessors and Microcontrollers For JNTU
Microprocessors and Microcontrollers: For JNTU is designed for undergraduate courses on the 16-bit microprocessor, and specifically for the syllabus of JNTU-K. The text comprehensively covers both the hardware and software aspects of the subject with equal emphasis on architecture, programming and i...
Autor principal: | |
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Formato: | Libro electrónico |
Idioma: | Inglés |
Publicado: |
Noida :
Pearson India
2011.
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Colección: | Always learning.
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Materias: | |
Ver en Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009820415506719 |
Tabla de Contenidos:
- Cover
- Contents
- Preface
- About the Author
- Roadmap to the Syllabus
- Chapter 0: Basics of Computer Systems
- 0.1 A Brief History of Microprocessors
- 0.1.1 The x86 Family
- 0.1.2 The x86 Philosophy
- 0.1.3 Personal Computers
- 0.2 Basics of Computer Architecture
- 0.2.1 The Block Diagram of a Computer
- 0.2.2 The System Bus
- 0.2.3 The Processor
- 0.2.4 System Clock
- 0.2.5 Memory
- 0.2.6 The I/O System
- 0.3 Computer Languages
- 0.3.1 Machine Language, Assembly Language and High Level Language
- 0.3.2 Comparison
- 0.4 RISC and CISC Architectures
- 0.5 Number Systems
- 0.5.1 The Decimal System
- 0.5.2 The Binary Number System
- 0.5.3 The Hexadecimal Number System
- 0.6 Number Format Conversions
- 0.6.1 Conversion from Decimal to Binary
- 0.6.2 Conversion from Decimal to Hexadecimal
- 0.6.3 Converting from Binary to Hexadecimal
- 0.6.4 BCD Numbers
- 0.6.5 ASCII Code
- 0.6.6 Representation of Negative Numbers
- 0.7 Computer Arithmetic
- 0.7.1 Addition of Unsigned Numbers
- 0.7.2 Addition of Packed BCD Numbers
- 0.7.3 Addition of Negative Numbers
- 0.7.4 Subtraction
- 0.7.5 Packed BCD Subtraction
- 0.7.6 Subtraction of Signed Numbers
- 0.7.7 Addition of Numbers of Different Lengths
- 0.8 Units of Memory Capacity
- 0.9 The 8085 Microprocessor
- 0.9.1 The Programming Model of 8085
- 0.9.2 Assembly Language Programming
- 0.9.2.1 Modes of Addressing
- 0.9.3 Instruction set of 8085
- 0.9.3.1 Data Transfer Instructions
- 0.9.3.2 Arithmetic Instructions
- 0.9.3.3 Branch Instructions
- 0.9.3.4 Logical and Bit Manipulation Instructions
- 0.9.4 Hardware Aspects of the 8085
- 0.9.4.1 Multiplexed Address/Data Bus
- 0.9.4.2 Read and Write
- 0.9.4.3 Power Supply and Clock
- 0.9.4.4 Reset and Ready Pins
- 0.9.4.5 Interrupt
- 0.9.4.6 Hold and HLDA
- 0.9.4.7 SID and SOD
- Key Points of this Chapter.
- Questions
- Exercises
- Chapter 1: The Architecture of 8086
- 1.1 Internal Block Diagram of the 8086
- 1.2 The Execution Unit
- 1.2.1 The Scratchpad Registers
- 1.2.2 Flag Register
- 1.3 Bus Interface Unit
- 1.3.1 The Instruction Queue
- 1.3.2 Memory Segmentation
- 1.3.2.1 Segment Registers
- 1.3.2.2 The Code Segment and the Instruction Pointer
- 1.3.2.3 The Stack Segment and the Stack Pointer
- 1.3.2.4 The Data Segment and Extra Segment
- 1.4 Addressing Modes
- Key Points of this Chapter
- Questions
- Exercises
- Chapter 2: Programming Concepts - I
- 2.1 The Assembly Process
- 2.1.1 Features of Assemblers
- 2.1.2 Instructions and Directives
- 2.1.3 The Forward Reference Problem
- 2.1.4 Two Pass Assemblers
- 2.2 Assemblers for x86
- 2.2.1 Why MASM?
- 2.2.2 Assembly Language Programming
- 2.3 Memory Models
- 2.3.1 The Tiny Model
- 2.3.2 COM and EXE Files
- 2.3.3 Definition of Data Types
- 2.3.4 The Small Model
- 2.3.5 The DUP Directive
- 2.3.6 The EQU Directive
- 2.3.7 The ORG Directive
- 2.3.8 Other Models
- 2.3.9 Full Segment Definition
- 2.3.10 General Rules for Writing Assembly Language
- 2.3.10 General Rules for Writing Assembly Language
- 2.4 Instruction Design
- 2.4.1 Manual Coding
- 2.4.2 Instruction Set Architecture (ISA)
- 2.4.3 Instruction Set Design of 8086
- 2.4.4 Designing a Code
- Key Points of this Chapter
- Questions
- Exercises
- Chapter 3: Programming Concepts - II
- 3.1 Approaches to Programming
- 3.1.1 BIOS and DOS Function Calls
- 3.1.2 Using DOS Function Calls
- 3.1.3 The Instruction Set of 8086
- 3.2 Data Transfer Instructions
- 3.2.1 MOV - Move
- 3.2.2 LEA - Load Effective Address
- 3.2.3 XLAT - Translate a Byte in AL
- 3.2.4 PUSH and POP
- 3.2.4.1 Operation of the Stack
- 3.2.4.2 Defining a Stack
- 3.3 Branch Instructions
- 3.3.1 JMP - Jump
- 3.3.1.1 The Near Jump.
- 3.3.1.2 The Short Jump
- 3.3.2 Other Forms of the Unconditional Jump Instruction
- 3.3.2.1 Conditional Jumps
- 3.3.2.2 Far Jump
- 3.3.3 The LOOP Instruction
- 3.4 Arithmetic Instructions
- 3.4.1 Flag Control Instructions
- 3.4.2 Addition Instructions
- 3.4.3 Subtraction
- 3.4.4 Compare Instruction
- 3.4.5 Unsigned Multiplication
- 3.4.6 Unsigned Division
- 3.5 Logical Instructions
- 3.6 Shift and Rotate Instructions
- 3.6.1 Shift
- 3.6.2 Rotate Instructions
- Key Points of this Chapter
- Questions
- Exercises
- Chapter4: Programming Concepts - III
- 4.1 String Instructions
- 4.1.1 The MOVS Instruction
- 4.1.2 The CMPS Instruction
- 4.1.3 The SCAS Instruction
- 4.1.4 The STOS and LODS Instructions
- 4.2 Procedures
- 4.2.1 Writing a Procedure
- 4.2.2 Call and Return Instructions
- 4.2.2.1 Intrasegment or 'Near' Call
- 4.2.2.2 Intersegment or Far Call
- 4.2.3 The RET Instruction
- 4.2.4 The Use of the Stack in Procedure Calls
- 4.2.5 Passing Parameters To and From Procedures
- 4.2.5.1 Passing Parameters Through Registers
- 4.2.5.2 Passing Parameters Through Memory
- 4.2.5.3 Passing Parameters Through the Stack
- 4.3 Macros
- 4.3.1 Writing a Macro
- 4.3.2 Using the 'Local' Directive in Macros
- 4.4 Number Format Conversions
- 4.4.1 Packed BCD to Unpacked BCD Conversion
- 4.4.2 BCD Calculations
- 4.5 ASCII Operations
- 4.5.1 ASCII Addition
- 4.5.2 ASCII Subtraction
- 4.5.3 Multiplication and Division
- 4.6 Conversions for Computations and Display/Entry
- 4.6.1 Converting ASCII Numbers to Binary Form
- 4.6.2 Converting Binary Numbers to ASCII Form
- 4.7 Signed Number Arithmetic
- 4.7.1 Comparison of Signed Numbers
- 4.7.2 Signed Multiplication and Division
- 4.7.3 Arithmetic Shift
- 4.8 Programming Using High Level Language Constructs
- Key Points of this Chapter
- Questions
- Exercises.
- Chapter 5: Programming Concepts - IV
- 5.1 Input/Output Programming
- 5.1.1 Memory Mapped I/O
- 5.1.2 Peripheral or Isolated I/O
- 5.2 I/O Instructions
- 5.2.1 Fixed Port Addressing
- 5.2.2 Variable Port Addressing
- 5.3 Modular Programming
- 5.3.1 PUBLIC
- 5.3.2 EXTRN
- 5.3.3 Frequently Used Modules
- 5.4 Programming in C with Assembly Modules
- Key Points of this Chapter
- Questions
- Exercises
- Chapter 6: The Hardware Structure of 8086
- 6.1 Pin Configuration
- 6.1.1 Minimum Mode Pins
- 6.1.2 De-multiplexing the Address/Data Bus
- 6.1.3 Minimum Mode Pin Functions
- 6.1.4 The De-multiplexed Address/Data Bus
- 6.1.4.1The Address Bus
- 6.1.4.2 The Data Bus
- 6.1.5 Control Signals for Read and Write
- 6.1.6 Memory and I/O
- 6.1.7 Clock Generation
- 6.1.8 Ready
- 6.1.9 Reset
- 6.1.10 Power on Reset
- 6.2 Clock
- 6.2.1 Read Machine Cycle
- 6.2.2 Wait Cycles
- 6.2.3 Write Machine Cycle
- 6.3 Other Processor Activities
- 6.3.1 Interrupt Lines
- 6.3.2 DMA
- 6.3.3 TEST
- 6.3.4 Bus High Enable (BHE )
- 6.3.5 Halt Machine Cycle
- 6.4 Maximum Mode
- 6.4.1 Bus Controller
- 6.4.2 Request/Grant pins
- 6.4.3 Queue Status pins QS0 , QS1
- 6.4.4 LOCK
- 6.5 Instruction Cycle
- 6.5.1 Delay Loops
- 6.5.2 Why Delay Loops?
- Key Points of this Chapter
- Questions
- Exercises
- Chapter 7: Memory and I/O Decoding
- 7.1 Memory Device Pins
- 7.2 Memory Address Decoding
- 7.2.1 Address Decoding Concepts
- 7.2.2 Address Decoding Using Block Decoders
- 7.2.3 Partial Address Decoding
- 7.3 Memory Banks
- 7.3.1 Odd Addresses Word
- 7.3.2 Why Memory Banks?
- 7.3.3 Using Separate Write Strobes
- 7.3.4 Memory Map of IBM-PC
- 7.4 I/O Address Decoding
- 7.4.1 Output Ports
- 7.4.2 Input Ports
- 7.4.3 Decoding 16-Bit I/O Addresses
- 7.4.4 Ports with 16-Bit Data Bus
- Key Points of this Chapter
- Questions
- Exercises.
- Chapter 8: The Interrupt Structure of 8086
- 8.1 Interrupts of 8086
- 8.1.1 Interrupt Response of 8086
- 8.1.2 Interrupt Service Routine and Interrupt Vector
- 8.1.3 Interrupt Vector Table
- 8.2 Dedicated Interrupt Types
- 8.2.1 INT 0 (Divide by Zero Error)
- 8.2.2 INT 1 (Single Stepping)
- 8.2.3 INT 2 (Non Maskable Interrupt)
- 8.2.4 INT 3 (Breakpoint Interrupt)
- 8.2.5 INT 4 (Overfl ow Interrupt)
- 8.2.6 Allocation of Interrupt Type Numbers
- 8.3 Software Interrupts
- 8.3.1 DOS and BIOS Interrupt Routines
- 8.4 Hardware Interrupts
- 8.4.1 NMI
- 8.4.2 INTR
- 8.5 Priority of Interrupts
- 8.6 Interrupt Type Allocation for Current PCs
- 8.6.1 BIOS and DOS Interrupts
- 8.6.2 BIOS 10H Functions
- 8.6.3 Video Adapter
- 8.6.4 History
- 8.6.5 Text and Graphics
- 8.6.6 Character Display
- 8.6.7 Color Configuration
- 8.7 BIOS 10H Functions
- 8.8 Addressing Video Memory Directly
- 8.9 Keyboard Interfacing
- 8.9.1 Computer Keyboard
- 8.9.2 Keyboard Hardware
- 8.9.2.1 Keyboard Controller
- 8.9.2.2 Scan Code
- 8.9.3 Keyboard Interrupt Type 09
- 8.9.3.1 BIOS INT 09 Routine
- 8.9.4 BIOS 16H Functions
- 8.10 Hooking an Interrupt
- 8.10.1 Terminate and Stay Resident
- 8.10.2 DOS Functions for Interrupt Hooks
- 8.10.3 Hooking Into Hardware Interrupts
- Key Points of this Chapter
- Questions
- Exercises
- Chapter 9: Peripheral Interfacing - I
- 9.1 Trainer Kit
- 9.2 Programmable Peripheral Interface (PPI)-8255A
- 9.2.1 Pin Configuration and Internal Block Diagram
- 9.2.2 Programming the PPI
- 9.3 Modes of Operation
- 9.4 Mode 0
- 9.4.1 Interfacing 16 Bits I/O Ports to the 8255
- 9.4.2 Bit Set Reset Mode
- 9.5 Mode 1
- 9.5.1 Strobed Input Mode
- 9.5.2 Mode 1: Strobed Output
- 9.6 Mode 2 (Strobed Bidirectional Bus I/O)
- 9.7 Centronics Printer Interface
- 9.7.1 History.
- 9.8 Interfacing an Analog-to-Digital Converter to the 8086.