Wide bandgap semiconductors for power electronics : materials, devices, applications

Wide bandgap semiconductors for power electronics materials, devices, applications

Wide Bandgap Semiconductors for Power Electronic A guide to the field of wide bandgap semiconductor technology Wide Bandgap Semiconductors for Power Electronics is a comprehensive and authoritative guide to wide bandgap materials silicon carbide, gallium nitride, diamond and gallium(III) oxide. With...

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Detalles Bibliográficos
Otros Autores: Wellmann, P. (Peter), editor (editor), Ohtani, Noboru, editor, Rupp, R. (Roland), editor
Formato: Libro electrónico
Idioma:Inglés
Publicado: Weinheim, Germany : Wiley-VCH [2022]
Materias:
Wide gap semiconductors.
Power electronics.
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009755131206719
Tabla de Contenidos:
  • Cover
  • Title Page
  • Copyright
  • Contents
  • Preface
  • Part I Silicon Carbide (SiC)
  • Chapter 1 Dislocation Formation During Physical Vapor Transport Growth of 4H‐SiC Crystals
  • 1.1 Introduction
  • 1.2 Formation of Basal Plane Dislocations During PVT Growth of 4H‐SiC Crystals
  • 1.2.1 Plan‐View X‐ray Topography Observations of Growth Front
  • 1.2.2 Cross‐Sectional X‐ray Topography Observations of Growth Front
  • 1.2.3 Characteristic BPD Distribution in PVT‐Grown 4H‐SiC Crystals
  • 1.2.4 BPD Multiplication During PVT Growth
  • 1.3 Dislocation Formation During Initial Stage of PVT Growth of 4H‐SiC Crystals
  • 1.3.1 Preparation of 4H‐SiC Wafers with Beveled Interface Between Grown Crystal and Seed Crystal
  • 1.3.2 Determination of Grown‐Crystal/Seed Interface by Raman Microscopy
  • 1.3.3 X‐ray Topography Observations of Dislocation Structure at Grown‐Crystal/Seed Interface
  • 1.3.4 Formation Mechanism of BPD Networks and Their Migration into Seed Crystal
  • 1.4 Conclusions
  • References
  • Chapter 2 Industrial Perspectives of SiC Bulk Growth
  • 2.1 Introduction
  • 2.2 SiC Substrates for GaN LEDs
  • 2.3 SiC Substrates for Power SiC Devices
  • 2.4 SiC Substrates for High‐Frequency Devices
  • 2.5 Cost Considerations for Commercial Production of SiC
  • 2.6 Raw Materials
  • 2.7 Reactor Hot Zone
  • 2.8 System Equipment
  • 2.9 Yield
  • 2.10 Turning Boules into Wafers
  • 2.11 Crystal Grind
  • 2.12 Wafer Slicing
  • 2.13 Wafer Polish
  • 2.14 Summary
  • Acknowledgments
  • References
  • Chapter 3 Homoepitaxial Growth of 4H‐SiC on Vicinal Substrates
  • 3.1 Introduction
  • 3.2 Fundamentals of 4H‐SiC Homoepitaxy for Power Electronic Devices
  • 3.2.1 4H‐SiC Polytype Replication for Homoepitaxial Growth on Vicinal Substrates
  • 3.2.2 Homoepitaxial Growth by Chemical Vapor Deposition (CVD) Process
  • 3.2.3 Doping in Homoepitaxial Growth.
  • 3.3 Extended Defects in Homoepitaxial Layers
  • 3.3.1 Classification of Extended Defects According to Glide Systems in 4H‐SiC
  • 3.3.2 Dislocation Reactions During Epitaxial Growth
  • 3.3.3 Characterization Methods for Extended Defects in 4H‐SiC Epilayers
  • 3.4 Point Defects and Carrier Lifetime in Epilayers
  • 3.4.1 Classification and General Properties of Point Defects in 4H‐SiC
  • 3.4.2 Basics on Recombination Carrier Lifetime in 4H‐SiC
  • 3.4.3 Carrier Lifetime‐Affecting Point Defects
  • 3.4.4 Carrier Lifetime Measurement in Epiwafers and Devices
  • 3.5 Conclusion
  • Acknowledgments
  • References
  • Chapter 4 Industrial Perspective of SiC Epitaxy
  • 4.1 Introduction
  • 4.2 Background
  • 4.3 The Basics of SiC Epitaxy
  • 4.4 SiC Epi Historical Origins
  • 4.5 Planetary Multi‐wafer Epitaxial Reactor Design Considerations
  • 4.5.1 Rapidly Rotating Reactors
  • 4.5.2 Horizontal Hot‐Wall Reactors
  • 4.6 Latest High‐Throughput Epitaxial Reactor Status
  • 4.7 Benefits and Challenges for Increasing Growth Rate in all Reactors
  • 4.8 Increasing Wafer Diameters, Device Processing Considerations, and Projections
  • 4.9 Summary
  • Acknowledgment
  • References
  • Chapter 5 Status of 3C‐SiC Growth and Device Technology
  • 5.1 Introduction, Motivation, Short Review on 3C‐SiC
  • 5.2 Nucleation and Epitaxial Growth of 3C‐SC on Si
  • 5.2.1 Growth Process
  • 5.2.2 Defects
  • 5.2.3 Stress
  • 5.3 Bulk Growth of 3C‐SiC
  • 5.3.1 Sublimation Growth of (111)‐oriented 3C‐SiC on Hexagonal SiC Substrates
  • 5.3.2 Sublimation Growth of 3C‐SiC on 3C‐SiC CVD Seeding Layers
  • 5.3.3 Continuous Fast CVD Growth of 3C‐SiC on 3C‐SiC CVD Seeding Layers
  • 5.4 Processing and Testing of 3C‐SiC Based Power Electronic Devices
  • 5.4.1 Prospects for 3C‐SiC Power Electronic Devices
  • 5.4.2 3C‐SiC Device Processing
  • 5.4.3 MOS Processing
  • 5.4.4 3C‐SiC/SiO2 Interface Passivation.
  • 5.4.5 Surface Morphology Effects on 3C‐SiC Thermal Oxidation
  • 5.4.6 Thermal Oxidation Temperature Effects for 3C‐SiC
  • 5.4.7 Ohmic Contact Metalization
  • 5.4.8 N‐type 3C‐SiC Ohmic Contacts
  • 5.4.9 Ion Implantation
  • 5.5 Summary
  • Acknowledgements
  • References
  • Chapter 6 Intrinsic and Extrinsic Electrically Active Point Defects in SiC
  • 6.1 Characterization of Electrically Active Defects
  • 6.1.1 Deep Level Transient Spectroscopy
  • 6.1.1.1 Profile Measurements
  • 6.1.1.2 Poole-Frenkel Effect
  • 6.1.1.3 Laplace DLTS
  • 6.1.2 Low‐energy Muon Spin Rotation Spectroscopy
  • 6.1.2.1 μSR and Semiconductors
  • 6.1.3 Density Functional Theory
  • 6.2 Intrinsic Electrically Active Defects in SiC
  • 6.2.1 The Carbon Vacancy, VC
  • 6.2.2 The Silicon Vacancy, VSi
  • 6.3 Transition Metal and Other Impurity Levels in SiC
  • 6.4 Summary
  • References
  • Chapter 7 Dislocations in 4H‐SiC Substrates and Epilayers
  • 7.1 Introduction
  • 7.2 Dislocations in Bulk 4H‐SiC
  • 7.2.1 Micropipes (MPs) and Closed‐core Threading Screw Dislocations (TSDs)
  • 7.2.2 Basal Plane Dislocations (BPDs)
  • 7.2.3 Threading Edge Dislocations (TEDs)
  • 7.2.4 Interaction between BPDs and TEDs
  • 7.2.4.1 Hopping Frank-Read Source of BPDs
  • 7.2.5 Threading Mixed Dislocations (TMDs) in 4H‐SiC
  • 7.2.5.1 Reaction Between Threading Dislocations with Burgers Vectors of −c + a and c + a Wherein the Opposite c‐Components Annihilate Leaving Behind the Two a‐Components
  • 7.2.5.2 Reaction Between Threading Dislocations with Burgers Vectors of −c and c + a Leaving Behind the a‐Component
  • 7.2.5.3 Reaction Between Opposite‐sign Threading Screw Dislocations with Burgers Vectors c and −c
  • 7.2.5.4 Nucleation of Opposite Pair of c + a Dislocations and Their Deflection
  • 7.2.5.5 Deflection of Threading c + a, c and Creation of Stacking Faults.
  • 7.2.6 Prismatic Slip during PVT growth 4H‐SiC Boules
  • 7.2.7 Relationship Between Local Basal Plane Bending and Basal Plane Dislocations in PVT‐grown 4H‐SiC Substrate Wafers
  • 7.2.8 Investigation of Dislocation Behavior at the Early Stage of PVT‐grown 4H‐SiC Crystals
  • 7.3 Dislocations in Homoepitaxial 4H‐SiC
  • 7.3.1 Conversion of BPDs into TEDs
  • 7.3.2 Susceptibility of Basal Plane Dislocations to the Recombination‐Enhanced Dislocation Glide in 4H Silicon Carbide
  • 7.3.3 Nucleation of TEDs, BPDs, and TSDs at Substrate Surface Damage
  • 7.3.4 Nucleation Mechanism of Dislocation Half‐Loop Arrays in 4H‐SiC Homo‐Epitaxial Layers
  • 7.3.5 V‐ and Y‐shaped Frank‐type Stacking Faults
  • 7.4 Summary
  • Acknowledgments
  • References
  • Chapter 8 Novel Theoretical Approaches for Understanding and Predicting Dislocation Evolution and Propagation
  • 8.1 Introduction
  • 8.2 General Modeling and Simulation Approaches
  • 8.3 Continuum Dislocation Modeling Approaches
  • 8.3.1 Alexander-Haasen Model
  • 8.3.2 Continuum Dislocation Dynamics Models
  • 8.3.2.1 The Simplest Model: Straight Parallel Dislocation with the Same Line Direction
  • 8.3.2.2 The "Groma" Model: Straight Parallel Dislocations with Two Line Directions
  • 8.3.2.3 The Kröner-Nye Model for Geometrically Necessary Dislocations
  • 8.3.2.4 Three‐dimensional Continuum Dislocation Dynamics (CDD)
  • 8.4 Example 1: Comparison of the Alexander-Haasen and the Groma Model
  • 8.4.1 Governing Equations
  • 8.4.2 Physical System and Model Setup
  • 8.4.3 Results and Discussion
  • 8.5 Example 2: Dislocation Flow Between Veins
  • 8.5.1 A Brief Introduction to Dislocation Patterning and the Similitude Principle
  • 8.5.2 Physical System and Model Setup
  • 8.5.3 Geometry and Initial Values
  • 8.5.4 Results and Discussion
  • 8.6 Summary and Conclusion
  • References.
  • Chapter 9 Gate Dielectrics for 4H‐SiC Power Switches: Understanding the Structure and Effects of Electrically Active Point Defects at the 4H‐SiC/SiO2 Interface
  • 9.1 Introduction
  • 9.2 Electrical Impact of Traps on MOSFET Characteristics
  • 9.2.1 Sub threshold Sweep Hysteresis
  • 9.2.2 Preconditioning Measurement
  • 9.2.3 Bias Temperature Instability
  • 9.2.4 Reduced Channel Electron Mobility
  • 9.3 Microscopic Nature of Electrically Active Traps Near the Interface
  • 9.3.1 The PbC Defect and the Subthreshold Sweep Hysteresis
  • 9.3.2 The Intrinsic Electron Trap and the Reduced MOSFET Mobility
  • 9.3.3 Point Defect Candidates for BTI
  • 9.4 Conclusions and Outlook
  • References
  • Chapter 10 Epitaxial Graphene on Silicon Carbide as a Tailorable Metal-Semiconductor Interface
  • 10.1 Introduction
  • 10.2 Epitaxial Graphene as a Metal
  • 10.3 Fabrication and Structuring of Epitaxial Graphene
  • 10.3.1 Epitaxial Growth by Thermal Decomposition
  • 10.3.2 Intercalation
  • 10.3.3 Structuring of Epitaxial Graphene Layers and Partial Intercalation
  • 10.4 Epitaxial Graphene as Tailorable Metal/Semiconductor Contact
  • 10.4.1 Ohmic Contacts
  • 10.4.2 Schottky Contacts
  • 10.5 Monolithic Epitaxial Graphene Electronic Devices and Circuits
  • 10.5.1 Discrete Epitaxial Graphene Devices
  • 10.5.2 Monolithic Integrated Circuits
  • 10.6 Novel Experiments on Light-Matter Interaction Enabled by Epitaxial Graphene
  • 10.6.1 High‐Frequency Operation and Ultimate Speed Limits of Schottky Diodes
  • 10.6.2 Transparent Electrical Access to SiC for Novel Quantum Technology Applications
  • 10.7 Conclusion
  • Acknowledgments
  • References
  • Chapter 11 Device Processing Chain and Processing SiC in a Foundry Environment
  • 11.1 Introduction
  • 11.2 DMOSFET Structure
  • 11.3 Process Integration of SiC MOSFETs
  • 11.3.1 Lithography
  • 11.3.2 SiC Etching.
  • 11.3.3 Ion Implantation and Activation Annealing.

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