Digital signal processing 101 everything you need to know to get started

Digital Signal Processing 101: Everything You Need to Know to Get Started provides a basic tutorial on digital signal processing (DSP). Beginning with discussions of numerical representation and complex numbers and exponentials, it goes on to explain difficult concepts such as sampling, aliasing, im...

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Detalles Bibliográficos
Otros Autores: Parker, Michael, 1963-, author (author)
Formato: Libro electrónico
Idioma:Inglés
Publicado: Oxford, United Kingdom ; Cambridge, MA : Newnes [2017]
Edición:Second edition
Materias:
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009631427506719
Tabla de Contenidos:
  • Front Cover
  • Digital Signal Processing 101
  • Digital Signal Processing 101: Everything you Need to Know to Get Started
  • Copyright
  • Contents
  • Acknowledgments
  • Introduction
  • 1 - Numerical Representation
  • 1.1 Integer Fixed Point Representation
  • 1.2 Fractional Fixed Point Representation
  • 1.3 Floating Point Representation
  • 2 - Complex Numbers and Exponentials
  • 2.1 Complex Addition and Subtraction
  • 2.2 Complex Multiplication
  • 2.3 Polar Representation
  • 2.4 Complex Multiplication Using Polar Representation
  • 2.5 Complex Conjugate
  • 2.6 The Complex Exponential
  • 2.7 Measuring Angles in Radians
  • 3 - Sampling, Aliasing, and Quantization
  • 3.1 Sampling Effects
  • 3.2 Nyquist Sampling Rule
  • 3.3 Quantization
  • 3.4 Signal to Noise Ratio
  • 4 - Frequency Response
  • 4.1 Frequency Response and the Complex Exponential
  • 4.2 Normalizing Frequency Response
  • 4.3 Sweeping Across the Frequency Response
  • 4.4 Example Frequency Responses
  • 4.5 Linear Phase Response
  • 4.6 Normalized Frequency Response Plots
  • 5 - Finite Impulse Response (FIR) Filters
  • 5.1 Finite Impulse Response Filter Construction
  • 5.2 Computing Frequency Response
  • 5.3 Computing Filter Coefficients
  • 5.4 Effect of Number of Taps on Filter Response
  • 6 - Windowing
  • 6.1 Truncation of Coefficients
  • 6.2 Tapering of Coefficients
  • 6.3 Sample Coefficient Windows
  • 7 - Decimation and Interpolation
  • 7.1 Decimation
  • 7.2 Interpolation
  • 7.3 Resampling by Noninteger Value
  • 8 - Infinite Impulse Response (IIR) Filters
  • 8.1 Infinite Impulse Response and Finite Impulse Response Filter Characteristic Comparison
  • 8.2 Bilinear Transform
  • 8.3 Frequency Prewarping
  • 9 - Complex Modulation and Demodulation
  • 9.1 Modulation Constellations
  • 9.2 Modulated Signal Bandwidth
  • 9.3 Pulse-Shaping Filter
  • 9.4 Raised Cosine Filter.
  • 10 - Discrete and Fast Fourier Transforms (DFT, FFT)
  • 10.1 Discrete Fourier Transform and Inverse Discrete Fourier Transform Equations
  • 10.2 First Discrete Fourier Transform Example
  • 10.3 Second Discrete Fourier Transform Example
  • 10.4 Third Discrete Fourier Transform Example
  • 10.5 Fourth Discrete Fourier Transform Example
  • 10.6 Fast Fourier Transform
  • 10.7 Filtering Using the Fast Fourier Transform and Inverse Fast Fourier Transform
  • 10.8 Bit Growth in Fast Fourier Transforms
  • 10.9 Bit Reversal Addressing
  • 11 - Digital Upconversion and Downconversion
  • 11.1 Digital Upconversion
  • 11.2 Digital Downconversion
  • 11.3 Intermediate Frequency Subsampling
  • 12 - Error-Correction Coding
  • 12.1 Linear Block Encoding
  • 12.2 Linear Block Decoding
  • 12.3 Minimum Coding Distance
  • 12.4 Convolutional Encoding
  • 12.5 Viterbi Decoding
  • 12.6 Soft Decision Decoding
  • 12.7 Cyclic Redundancy Check
  • 12.8 Shannon Capacity and Limit Theorems
  • 13 - Matrix Inversion
  • 13.1 Matrix Basics
  • 13.2 Cholesky Decomposition
  • 13.3 4×4 Cholesky Example
  • 13.4 QR Decomposition
  • 13.5 Gram-Schmidt Method
  • 13.6 QR Decomposition Restructuring for Parallel Implementation
  • 14 - Field-Oriented Motor Control
  • 14.1 Magnetism Basics
  • 14.2 AC Motor Basics
  • 14.3 DC Motor Basics
  • 14.4 Electronic Commutation
  • 14.5 AC Induction Motor
  • 14.6 Motor Control
  • 14.7 Park and Clark Transforms
  • 15 - Analog and Time Division Multiple Access Wireless Communications
  • 15.1 Early Digital Innovations
  • 15.2 Frequency Modulation
  • 15.3 Digital Signal Processor
  • 15.4 Digital Voice Phone Systems
  • 15.5 Time Division Multiple Access Modulation and Demodulation
  • 16 - CDMA Wireless Communications
  • 16.1 Spread Spectrum Technology
  • 16.2 Direct Sequence Spread Spectrum
  • 16.3 Walsh Codes
  • 16.4 Concept of Code Division Multiple Access.
  • 16.5 Walsh Code Demodulation
  • 16.6 Network Synchronization
  • 16.7 RAKE Receiver
  • 16.8 Pilot Pseudorandom Number Codes
  • 16.9 Code Division Multiple Access Transmit Architecture
  • 16.10 Variable Rate Vocoder
  • 16.11 Soft Handoff
  • 16.12 Uplink Modulation
  • 16.13 Power Control
  • 16.14 Higher Data Rates
  • 16.15 Spectral Efficiency Considerations
  • 16.16 Other Code Division Multiple Access Technologies
  • 17 - Orthogonal Frequency Division Multiple Access Wireless Communications
  • 17.1 WiMax and Long-Term Evolution
  • 17.2 Orthogonal Frequency Division Multiple Access Advantages
  • 17.3 Orthogonality of Periodic Signals
  • 17.4 Frequency Spectrum of Orthogonal Subcarrier
  • 17.5 Orthogonal Frequency Division Multiplexing Modulation
  • 17.6 Intersymbol Interference and the Cyclic Prefix
  • 17.7 Multiple Input and Multiple Output Equalization
  • 17.8 Orthogonal Frequency Division Multiple Access System Considerations
  • 17.9 Orthogonal Frequency Division Multiple Access Spectral Efficiency
  • 17.10 Orthogonal Frequency Division Multiple Access Doppler Frequency Shift
  • 17.11 Peak to Average Ratio
  • 17.12 Crest Factor Reduction
  • 17.13 Digital Predistortion
  • 17.14 Remote Radio Head
  • 18 - Radar Basics
  • 18.1 Radar Frequency Bands
  • 18.2 Radar Antennas
  • 18.3 Radar Range Equation
  • 18.4 Stealth Aircraft
  • 18.5 Pulsed Radar Operation
  • 18.6 Pulse Compression
  • 18.7 Pulse Repetition Frequency
  • 18.8 Detection Processing
  • 19 - Pulse Doppler Radar
  • 19.1 Doppler Effect
  • 19.2 Pulsed Frequency Spectrum
  • 19.3 Doppler Ambiguities
  • 19.4 Radar Clutter
  • 19.5 Pulse Repetition Frequency Trade-Offs
  • 19.6 Target Tracking
  • 20 - Automotive Radar
  • 20.1 Frequency-Modulated Continuous-Wave Theory
  • 20.2 Frequency-Modulated Continuous-Wave Range Detection
  • 20.3 Frequency-Modulated Continuous-Wave Doppler Detection.
  • 20.4 Frequency-Modulated Continuous-Wave Radar Link Budget
  • 20.5 Frequency-Modulated Continuous-Wave Implementation Considerations
  • 20.6 Frequency-Modulated Continuous-Wave Interference
  • 20.7 Frequency-Modulated Continuous-Wave Beamforming
  • 20.8 Frequency-Modulated Continuous-Wave Range-Doppler Processing
  • 20.9 Frequency-Modulated Continuous-Wave Radar Front-End Processing
  • 20.10 Frequency-Modulated Continuous-Wave Pulse-Doppler Processing
  • 20.11 Frequency-Modulated Continuous-Wave Radar Back-End Processing
  • 20.12 Noncoherent Antenna Magnitude Summation
  • 20.13 Cell Averaging-Constant False Alarm Rate
  • 20.14 Ordered Sort-Constant False Alarm Rate
  • 20.15 Angle of Arrival Estimation
  • 21 - Space Time Adaptive Processing (STAP) Radar
  • 21.1 Space Time Adaptive Processing Radar Concept
  • 21.2 Steering Vector
  • 21.3 Interference Covariance Matrix
  • 21.4 Space Time Adaptive Processing Optimal Filter
  • 21.5 Space Time Adaptive Processing Radar Computational Requirements
  • 22 - Synthetic Array Radar
  • 22.1 Introduction
  • 22.2 Synthetic Array Radar Resolution
  • 22.3 Pulse Compression
  • 22.4 Azimuth Resolution
  • 22.5 Synthetic Array Radar Processing
  • 22.6 Synthetic Array Radar Doppler Processing
  • 22.7 Synthetic Array Radar Impairments
  • 23 - Introduction to Video Processing
  • 23.1 Color Spaces
  • 23.2 Interlacing
  • 23.3 Deinterlacing
  • 23.4 Image Resolution and Bandwidth
  • 23.5 Chroma Scaling
  • 23.6 Image Scaling and Cropping
  • 23.7 Alpha Blending and Compositing
  • 23.8 Video Compression
  • 23.9 Digital Video Interfaces
  • 23.10 Legacy Analog Video Interfaces
  • 24 - DCT, Entropy, Predictive Coding, and Quantization
  • 24.1 Discrete Cosine Transform
  • 24.2 Entropy
  • 24.3 Huffman Coding
  • 24.4 Markov Source
  • 24.5 Predictive Coding
  • 24.6 Differential Encoding
  • 24.7 Lossless Compression
  • 24.8 Quantization.
  • 24.9 Decibels
  • 25 - Image and Video Compression Fundamentals
  • 25.1 Baseline JPEG
  • 25.2 DC Scaling
  • 25.3 Quantization Tables
  • 25.4 Entropy Coding
  • 25.5 JPEG Extensions
  • 25.6 Video Compression Basics
  • 25.7 Block Size
  • 25.8 Motion Estimation
  • 25.9 Frame Processing Order
  • 25.10 Compressing I Frames
  • 25.11 Compressing P Frames
  • 25.12 Compressing B Frames
  • 25.13 Rate Control and Buffering
  • 25.14 Quantization Scale Factor
  • 26 - Introduction to Machine Learning
  • 26.1 Convolutional Neural Networks
  • 26.2 Convolution Layer
  • 26.3 Rectified Linear Unit Layer
  • 26.4 Normalization Layer
  • 26.5 Max-Pooling Layer
  • 26.6 Fully Connected Layer
  • 26.7 Training Computational Neural Networks
  • 26.8 Winograd Transform
  • 26.9 Convolutional Neural Network Numerical Precision Requirements
  • 27 - Implementation Using Digital Signal Processors
  • 27.1 Digital Signal Processing Processor Architectural Enhancements
  • 27.1.1 Data I/O Bandwidth
  • 27.1.2 Core Processing
  • 27.1.3 Multiple Cores or Hardware Coprocessors
  • 27.2 Scalability
  • 27.3 Floating Point
  • 27.4 Design Methodology
  • 27.5 Managing Resources
  • 27.6 Ecosystem
  • 28 - Implementation Using FPGAs
  • 28.1 FPGA Design Methodology
  • 28.2 DSP Processor or FPGA Choice
  • 28.3 Design Methodology Considerations
  • 28.4 Dedicated Digital Signal Processing Circuit Blocks in FPGAs
  • 28.4.1 Adjustable Precision Multipliers
  • 28.4.2 Accumulator
  • 28.4.3 Postadder (Subtractor) and Distributed Adder
  • 28.4.4 Preadder (Subtractor)
  • 28.4.5 Coefficient Storage
  • 28.4.6 Barrel Shifter
  • 28.4.7 Rounding and Saturation
  • 28.4.8 Arithmetic Logic Unit Operations and Boolean Operations
  • 28.4.9 Specialty Operations
  • 28.4.10 Tco and Fmax
  • 28.5 Floating Point Implementation Using FPGAs
  • 28.6 Ecosystem
  • 28.7 Future Trends
  • 29 - Implementation With GPUs.
  • 29.1 Characteristics of Graphics Processing Unit Architecture.