Advances in Computers Volume 98. Volume 98.

Since its first volume in 1960, Advances in Computers has presented detailed coverage of innovations in computer hardware, software, theory, design, and applications. It has also provided contributors with a medium in which they can explore their subjects in greater depth and breadth than journal ar...

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Detalles Bibliográficos
Autor principal: Hurson, A. R. (-)
Otros Autores: Hurson, A. R. Contributor (contributor)
Formato: Libro electrónico
Idioma:Inglés
Publicado: Amsterdam, Netherlands : Elsevier 2015.
Edición:First edition
Materias:
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009630036106719
Tabla de Contenidos:
  • Front Cover; Advances in Computers; Copyright; Contents; Preface; Chapter One: An Overview of Architecture-Level Power- and Energy-Efficient Design Techniques; 1. Introduction; 2. Metrics of Interest; 2.1. Circuit-Level Metrics; 2.1.1. Basic Metrics; 2.1.2. Derived Metrics; 2.2. Architectural-Level Metrics; 3. Classification of Selected Architecture-Level Techniques; 3.1. Criteria; 3.2. List of Selected Examples; 3.3. Postclassification Conclusion; 4. Presentation of Selected Architecture-Level Techniques; 4.1. Core; 4.1.1. Dynamic; DVFS; OS Level; Compiler Analysis-Based DVFS
  • Power Phase Analysis-Based DVFSDVFS for Multiple Clock Domain Processors; Dynamic Work Steering; Optimizing Issue Width; 4.1.2. Static and Dynamic; Combined ABB and DVFS; 4.2. Core-Pipeline; 4.2.1. Dynamic; Clock Gating; Deterministic Clock Gating; Improving Energy Efficiency of Speculative Execution; Significance Compression; Work Reuse; Instruction-Level Reuse; Basic Block-Level Reuse; Trace-Level Reuse; Region Reuse; 4.3. Core-Front-End; 4.3.1. Dynamic; Exploiting Narrow-Width Operands; Instruction Queue Resizing; Loop Cache; Trace Cache; 4.3.2. Static; Idle Register File DVS
  • Register File Access Optimization4.4. Core-Back-End; 4.4.1. Dynamic; Exploiting Narrow-Width Operands; Integers; Floating Point; Work Reuse; 4.4.2. Static; Power Gating; Vt-Based Technique; 4.5. Conclusion About the Existing Solutions; 5. Future Trend; 6. Conclusion; References; Chapter Two: A Survey of Research on Data Corruption in Cyber-Physical Critical Infrastructure Systems; 1. Introduction; 2. Sources of Corrupted Data; 3. Sensor Networks: Application for Comparison; 3.1. Sensor Network Database Requirements; 3.2. Sensor Network Architectures; 3.2.1. Centralized; 3.2.2. Distributed
  • 3.3. Sensor Network Data Propagation4. Detection of Corrupted Data; 4.1. Statistical Detection; 4.1.1. Types of Data Anomalies; 4.1.2. Statistical Detection Approaches; 4.2. Behavioral Approaches; 5. Mitigation of Data Corruption; 6. Propagation of Corrupted Data; 6.1. Propagation from Execution; 6.2. Corrupted Data in a Sensor Node; 7. Conclusion and Future Direction; References; Chapter Three: A Research Overview of Tool-Supported Model-based Testing of Requirements-based Designs; 1. Introduction; 2. The Generic Model-based Testing Approach; 3. Proposed Taxonomy Dimensions
  • 3.1. The Modeling Notation3.2. The Test Artifact; 3.3. Test Selection Criteria; 3.4. The Test Generation Method; 3.5. The Technology; 3.6. The Mapping; 4. A Research Review of Model-based Testing Tools; 4.1. Selection Criteria and Procedures for Including/Excluding Model-based Testing Tools; 4.2. Our Taxonomy; 5. Running Example: The Coffee/Tea Vending Machine; 6. Model-based Testing Tools for Pre/Post Notations; 6.1. The Z Language; 6.2. The B-Method; 6.3. Spec#; 6.4. AsmL; 6.5. The Coffee/Tea Vending Machine in ProTest; 7. Model-based Testing Tools for Transition-based Notations
  • 7.1. Finite State Machines