Nano-CMOS gate dielectric engineering

According to Moore's Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the...

Descripción completa

Detalles Bibliográficos
Autor principal: Wong, Hei (-)
Formato: Libro electrónico
Idioma:Inglés
Publicado: Boca Raton : CRC Press 2012.
Edición:1st edition
Materias:
Ver en Biblioteca Universitat Ramon Llull:https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627662906719

Ejemplares similares