Network algorithmics an interdisciplinary approach to designing fast networked devices
In designing a network device, you make dozens of decisions that affect the speed with which it will perform-sometimes for better, but sometimes for worse. Network Algorithmics provides a complete, coherent methodology for maximizing speed while meeting your other design goals.Author George Varghese...
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| Formato: | Libro electrónico |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; London :
Elsevier
c2005.
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| Edición: | 1st edition |
| Colección: | Morgan Kaufmann series in networking.
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| Materias: | |
| Ver en Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009627128106719 |
Tabla de Contenidos:
- Front cover; Title page; Copyright page; Table of contents; Preface; Audience; What This Book is About; Organitztion of the Book; Features; Usage; Why This Book Was Written; Acknowledgements; PART I The Rules of the Game; CHAPTER 1 Introducing Network Algorithmics; 1.1 THE PROBLEM: NETWORK BOTTLENECKS; 1.1.1 Endnode Bottlenecks; 1.1.2 Router Bottlenecks; 1.2 THE TECHNIQUES: NETWORK ALGORITHMICS; 1.2.1 Warm-up Example: Scenting an Evil Packet; 1.2.2 Strawman Solution; 1.2.3 Thinking Algorithmically; 1.2.4 Refining the Algorithm: Exploiting Hardware; 1.2.5 Cleaning Up
- 1.2.6 Characteristics of Network Algorithmics1.3 EXERCISE; CHAPTER 2 Network Implementation Models; 2.1 PROTOCOLS; 2.1.1 Transport and Routing Protocols; 2.1.2 Abstract Protocol Model; 2.1.3 Performance Environment and Measures; 2.2 HARDWARE; 2.2.1 Combinatorial Logic; 2.2.2 Timing and Power; 2.2.3 Raising the Abstraction Level of Hardware Design; 2.2.4 Memories; 2.2.5 Memory Subsystem Design Techniques; 2.2.6 Component-Level Design; 2.2.7 Final Hardware Lessons; 2.3 NETWORK DEVICE ARCHITECTURES; 2.3.1 Endnode Architecture; 2.3.2 Router Architecture; 2.4 OPERATING SYSTEMS
- 2.4.1 Uninterrupted Computation via Processes2.4.2 Infinite Memory via Virtual Memory; 2.4.3 Simple I/O via System Calls; 2.5 SUMMARY; 2.6 EXERCISES; CHAPTER 3 Fifteen Implementation Principles; 3.1 MOTIVATING THE USE OF PRINCIPLES - UPDATING TERNARY CONTENT-ADDRESSABLE MEMORIES; 3.2 ALGORITHMS VERSUS ALGORITHMICS; 3.3 FIFTEEN IMPLEMENTATION PRINCIPLES - CATEGORIZATION AND DESCRIPTION; 3.3.1 Systems Principles; 3.3.2 Principles for Modularity with Efficiency; 3.3.3 Principles for Speeding Up Routines; 3.4 DESIGN VERSUS IMPLEMENTATION PRINCIPLES; 3.5 CAVEATS; 3.5.1 Eight Cautionary Questions
- 3.6 SUMMARY3.7 EXERCISES; CHAPTER 4 Principles in Action; 4.1 BUFFER VALIDATION OF APPLICATION DEVICE CHANNELS; 4.2 SCHEDULER FOR ASYNCHRONOUS TRANSFER MODE FLOW CONTROL; 4.3 ROUTE COMPUTATION USING DIJKSTRA'S ALGORITHM; 4.4 ETHERNET MONITOR USING BRIDGE HARDWARE; 4.5 DEMULTIPLEXING IN THE X-KERNEL; 4.6 TRIES WITH NODE COMPRESSION; 4.7 PACKET FILTERING IN ROUTERS; 4.8 AVOIDING FRAGMENTATION OF LINK STATE PACKETS; 4.9 POLICING TRAFFIC PATTERNS; 4.10 IDENTIFYING A RESOURCE HOG; 4.11 GETTING RID OF THE TCP OPEN CONNECTION LIST; 4.12 ACKNOWLEDGMENT WITHHOLDING
- 4.13 INCREMENTALLY READING A LARGE DATABASE4.14 BINARY SEARCH OF LONG IDENTIFIERS; 4.15 VIDEO CONFERENCING VIA ASYNCHRONOUS TRANSFER MODE; PART II Playing with Endnodes; CHAPTER 5 Copying Data; 5.1 WHY DATA COPIES; 5.2 REDUCING COPYING VIA LOCAL RESTRUCTURING; 5.2.1 Exploiting Adaptor Memory; 5.2.2 Using Copy-on-Write; 5.2.3 Fbufs: Optimizing Page Remapping; 5.2.4 Transparently Emulating Copy Semantics; 5.3 AVOIDING COPYING USING REMOTE DMA; 5.3.1 Avoiding Copying in a Cluster; 5.3.2 Modern-Day Incarnations of RDMA; 5.4 BROADENING TO FILE SYSTEMS; 5.4.1 Shared Memory
- 5.4.2 IO-Lite: A Unified View of Buffering
