Miniaturized Transistors

What is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design make...

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Detalles Bibliográficos
Otros Autores:	Grasser, Tibor (auth), Filipovic, Lado
Formato:	Libro electrónico
Idioma:	Inglés
Publicado:	MDPI - Multidisciplinary Digital Publishing Institute 2019
Materias:	MOSFET total ionizing dose (TID) low power consumption process simulation two-dimensional material negative-capacitance power consumption technology computer aided design (TCAD) thin-film transistors (TFTs) band-to-band tunneling (BTBT) nanowires inversion channel metal oxide semiconductor field effect transistor (MOSFET) spike-timing-dependent plasticity (STDP) field effect transistor segregation systematic variations Sentaurus TCAD indium selenide nanosheets technology computer-aided design (TCAD) high-? dielectric subthreshold bias range statistical variations fin field effect transistor (FinFET) compact models non-equilibrium Green's function etching simulation highly miniaturized transistor structure compact model silicon nanowire surface potential Silicon-Germanium source/drain (SiGe S/D) nanowire plasma-aided molecular beam epitaxy (MBE) phonon scattering mobility silicon-on-insulator drain engineered device simulation variability semi-floating gate synaptic transistor neuromorphic system theoretical model CMOS ferroelectrics tunnel field-effect transistor (TFET) SiGe metal gate granularity buried channel ON-state bulk NMOS devices ambipolar piezoelectrics tunnel field effect transistor (TFET) FinFETs polarization field-effect transistor line edge roughness random discrete dopants radiation hardened by design (RHBD) low energy flux calculation doping incorporation low voltage topography simulation MOS devices low-frequency noise high-k layout level set process variations subthreshold metal gate stack electrostatic discharge (ESD)
Ver en Biblioteca Universitat Ramon Llull:	https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009438384806719