Embedded Firmware Solutions Development Best Practices for the Internet of Things
Embedded Firmware Solutions is the perfect introduction and daily-use field guide--for the thousands of firmware designers, hardware engineers, architects, managers, and developers--to Intel’s new firmware direction (including Quark coverage), showing how to integrate Intel® Architecture designs int...
| Autores principales: | , , , |
|---|---|
| Formato: | Libro electrónico |
| Idioma: | Inglés |
| Publicado: |
Berkeley, CA :
Springer Nature
2015
2015. |
| Edición: | 1st ed. 2015. |
| Colección: | Expert's voice in programming.
|
| Materias: | |
| Ver en Biblioteca Universitat Ramon Llull: | https://discovery.url.edu/permalink/34CSUC_URL/1im36ta/alma991009432701906719 |
Tabla de Contenidos:
- Contents at a Glance; Introduction; Chapter 1: Introduction; What Is Embedded Firmware?; Where Is Firmware?; What Do Firmware Engineers Do?; Firmware Preparation for New Hardware; The Mystery of Bits; Programming Guides; The Intel® Firmware Support Package; The Uniqueness of Embedded Firmware; The Choice of Firmware Stacks; Welcome to the Era of the Internet of Things; Technical Coverage in This Book; The Future of Firmware; Chapter 2: Firmware Stacks for Embedded Systems; Is a One-Size-Fits-All Solution Possible?; Microkernel; Real-Time Operating S ystem (RTOS); Legacy BIOS
- Implementations of the UEFI FrameworkOpen Source Firmware Stacks; Proprietary Firmware Stacks; Make o r Buy; The Advantages of Outsourcing; The Disadvantages of Outsourcing; In-House Development; Summary; Chapter 3: Intel® Firmware Support Package (Intel® FSP); The Intel FSP Philosophy; What Is in Intel FSP?; Intel FSP Binary Format; Sample Boot Flow; Locating the Entries of Intel FSP; The Hard Way to Find Intel FSP APIs: Use Data Structure; The Easy Way to Find FSP APIs: Use Hard-Coded Constants; Programming Interface: The APIs of Intel FSP; TempRamInit; FspInitEntry; NotifyPhase
- Intel FSP OutputAPI Execution Status; Temporary Memory Data HOB; Non-Volatile Storage HOB; Sample Code for Parsing HOBs; Customization of Intel FSP; Downloading Intel FSP; Microcode Patches; Relocating Intel FSP; Integration and Build; The Future of Intel FSP; What Is Coming in the Following Chapters; Chapter 4: Building coreboot with Intel FSP; The Introduction of coreboot; The Philosophy of coreboot; A Brief History; v1: 1999-2000; v2: 2000-2005; v2+: 2005-2008; v3: 2006-2008; 2008 LinuxBIOS Renamed "coreboot"; v4: 2009-2012; v4+: 2012-2014; Further Reading
- Prerequisites for Working with corebootCommunity Organization; Git and Gerrit; Git Commit Messages; coreboot Sign-off Procedure; Developer's Certificate of Origin 1.1; Adding Your Sign-off; Working with the coreboot Community; coreboot Do's; coreboot Don'ts; Nonsource Binaries in coreboot; A Hands-on Example: Building coreboot for the MinnowBoard MAX Mainboard; Environment; Hardware: MinnowBoard MAX; MinnowBoard MAX Platform Details; Development Directory; Downloading Intel FSP; Installing Intel FSP; Downloading the coreboot Source; coreboot Toolchain; coreboot Commit Hooks
- Creating a coreboot Development BranchBuilding the Mainboard; On the Menuconfig Menu; On the Chipset Menu; On the Devices Menu; Build; Summary of Commands; Flashing the ROM; Preparing the Flash Programmer; Flashing the ROM Image; coreboot Internals; Boot Stages; Additional Files; CBFS; An Example of CBFS; CBFS Size; Special Binaries; Boot Flow Using Intel FSP; Reset Vector and Bootblock; romstage; ramstage; Payload; coreboot Source; coreboot Device Tree; Chips and Devices; Device Tree Variables; A Device Tree Example; Chip Operations; Device Operations; coreboot Hardwaremain State Machine
- State Machine States
